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Silicon Labs /BGM220SC22WGA /RAC_S /SYMMDCTRL

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Interpret as SYMMDCTRL

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https://regviz.com/r/Silicon Labs/EFR32BG22C224F512GM32/RAC_S/SYMMDCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disable)SYMMDENRSDIG 0 (Divideby1)SYMMDDIVRSDIG 0 (rx_w_swctrl)SYMMDMODE

SYMMDMODE=rx_w_swctrl, SYMMDDIVRSDIG=Divideby1, SYMMDENRSDIG=disable

Fields

SYMMDENRSDIG

SYMMDENRSDIG

0 (disable): undefined

1 (enable): undefined
SYMMDDIVRSDIG

SYMMDDIVRSDIG

0 (Divideby1): undefined

1 (Divideby2): undefined

2 (Divideby4): undefined

3 (Divideby8): undefined
SYMMDMODE

SYMMDMODE

0 (rx_w_swctrl): undefined

1 (rx_wo_swctrl): undefined

2 (qnc_dsm2): undefined

3 (qnc_dsm3): undefined

4 (rxlp_wo_swctrl): undefined

5 (notuse_5): undefined

6 (notuse_6): undefined

7 (notuse_7): undefined

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data